Отправлено BLACKEAGLE 20 марта 2002 г. 18:23 В ответ на: cygnal отправлено koooo 20 марта 2002 г. 18:18

;---------------------------------------------------------------
; CYGNAL Integrated Products 
;
; Assembly Code Configuration Tool: F021 INITIALIZATION/CONFIGURATION CODE
;----------------------------------------------------------------
; This file is read only. To insert the code into your  
; application, simply cut and paste or use the "Save As" 
; command in the file menu to save the file in your project 
; directory. 
;----------------------------------------------------------------

;----------------------------------------------------------------
; GLOBAL VARIABLES AND ASSIGNMENTS
;----------------------------------------------------------------
$INCLUDE(C8051F020.INC)	; Register definition file.
;----------------------------------------------------------------
; INTERRUPT VECTOR CODE
;----------------------------------------------------------------
	org	00h
	LJMP Config
; Place jump to reset handler and interrupt service routines here.
Config:
	org 0B3h		; End of Interrupt Vector space.
;----------------------------------------------------------------
; Watchdog Timer Configuration
;
; WDTCN.[7:0]: WDT Control
;   Writing 0xA5 enables and reloads the WDT.
;   Writing 0xDE followed within 4 clocks by 0xAD disables the WDT
;   Writing 0xFF locks out disable feature.
;
; WDTCN.[2:0]: WDT timer interval bits
;   NOTE! When writing interval bits, bit 7 must be a 0.
;
;  Bit 2 | Bit 1 | Bit 0
;------------------------     
;    1   |   1   |   1      Timeout interval = 1048576 x Tsysclk
;    1   |   1   |   0      Timeout interval =  262144 x Tsysclk
;    1   |   0   |   1      Timeout interval =   65636 x Tsysclk
;    1   |   0   |   0      Timeout interval =   16384 x Tsysclk
;    0   |   1   |   1      Timeout interval =    4096 x Tsysclk
;    0   |   1   |   0      Timeout interval =    1024 x Tsysclk
;    0   |   0   |   1      Timeout interval =     256 x Tsysclk
;    0   |   0   |   0      Timeout interval =      64 x Tsysclk 
;------------------------
	mov WDTCN, #007h	; Watchdog Timer Control Register
;----------------------------------------------------------------
; CROSSBAR REGISTER CONFIGURATION
;
; NOTE: The crossbar register should be configured before any  
; of the digital peripherals are enabled. The pinout of the 
; device is dependent on the crossbar configuration so caution 
; must be exercised when modifying the contents of the XBR0, 
; XBR1, and XBR2 registers. For detailed information on 
; Crossbar Decoder Configuration, refer to Application Note 
; AN001, "Configuring the Port I/O Crossbar Decoder". 
;----------------------------------------------------------------
; Configure the XBRn Registers
  mov XBR0, #000h	; XBAR0: Initial Reset Value
  mov XBR1, #000h	; XBAR1: Initial Reset Value
  mov XBR2, #000h	; XBAR2: Initial Reset Value
; Select Pin I/0
; NOTE: Some peripheral I/O pins can function as either inputs or 
; outputs, depending on the configuration of the peripheral. By default,
; the configuration utility will configure these I/O pins as push-pull 
; outputs.  If the I/O direction changes to input once the peripheral is
; configured, the peripheral hardware will override the PRTnCF register 
; setting and change the pin configuration to input.
                      ; Port configuration (1 = Push Pull Output)
  mov P0MDOUT, #000h ; Output configuration for P0 
  mov P1MDOUT, #000h ; Output configuration for P1 
  mov P2MDOUT, #000h ; Output configuration for P2 
  mov P3MDOUT, #000h ; Output configuration for P3 
  mov P1MDIN, #0FFh  ; Input configuration for P1
; View port pinout
		; The current Crossbar configuration results in the 
		; following port pinout assignment:
		; Port 0
		; P0.0 = unassigned      (Open-Drain Output/Input)
		; P0.1 = unassigned      (Open-Drain Output/Input)
		; P0.2 = unassigned      (Open-Drain Output/Input)
		; P0.3 = unassigned      (Open-Drain Output/Input)
		; P0.4 = unassigned      (Open-Drain Output/Input)
		; P0.5 = unassigned      (Open-Drain Output/Input)
		; P0.6 = unassigned      (Open-Drain Output/Input)
		; P0.7 = unassigned      (Open-Drain Output/Input)
		; Port 1
		; P1.0 = unassigned      (Open-Drain Output/Input)
		; P1.1 = unassigned      (Open-Drain Output/Input)
		; P1.2 = unassigned      (Open-Drain Output/Input)
		; P1.3 = unassigned      (Open-Drain Output/Input)
		; P1.4 = unassigned      (Open-Drain Output/Input)
		; P1.5 = unassigned      (Open-Drain Output/Input)
		; P1.6 = unassigned      (Open-Drain Output/Input)
		; P1.7 = unassigned      (Open-Drain Output/Input)
					
		; Port 2		
		; P2.0 = unassigned      (Open-Drain Output/Input)
		; P2.1 = unassigned      (Open-Drain Output/Input)
		; P2.2 = unassigned      (Open-Drain Output/Input)
		; P2.3 = unassigned      (Open-Drain Output/Input)
		; P2.4 = unassigned      (Open-Drain Output/Input)
		; P2.5 = unassigned      (Open-Drain Output/Input)
		; P2.6 = unassigned      (Open-Drain Output/Input)
		; P2.7 = unassigned      (Open-Drain Output/Input)
		; Port 3		
		; P3.0 = unassigned      (Open-Drain Output/Input)
		; P3.1 = unassigned      (Open-Drain Output/Input)
		; P3.2 = unassigned      (Open-Drain Output/Input)
		; P3.3 = unassigned      (Open-Drain Output/Input)
		; P3.4 = unassigned      (Open-Drain Output/Input)
		; P3.5 = unassigned      (Open-Drain Output/Input)
		; P3.6 = unassigned      (Open-Drain Output/Input)
		; P3.7 = unassigned      (Open-Drain Output/Input)
; Configure External Memory Configuration
  mov EMI0CF, #000h  ; External Memory Configuration Register
;----------------------------------------------------------------
; Comparators Register Configuration
;
; Bit 7  | Bit 6  | Bit 5  | Bit 4  | Bit 3 | Bit 2 | Bit 1 | Bit 0
;------------------------------------------------------------------     
;  R/W   |  R     | R/W    | R/W    | R/W   | R/W   | R/W   | R/W
;------------------------------------------------------------------
; Enable | Output | Rising | Falling|  Positive     |  Negative    
;        | State  | Edge   | Edge   |  Hysterisis   |  Hysterisis    
;        | Flag   | Int.   | Int.   |  00: Disable  |  00: Disable
;        |        | Flag   | Flag   |  01:  5mV     |  01:  5mV  
;        |        |        |        |  10: 10mV     |  10: 10mV
;        |        |        |        |  11: 20mV     |  11: 20mV 
; ----------------------------------------------------------------
	mov CPT0CN, #000h	  ; Comparator 0 Control Register
	
	mov CPT1CN, #000h	  ; Comparator 1 Control Register
	
	;Comp1 marker
					
;----------------------------------------------------------------
; Oscillator Configuration
;----------------------------------------------------------------
	mov OSCXCN, #000h	; External Oscillator Control Register	
	mov OSCICN, #004h	; Internal Oscillator Control Register
	
;----------------------------------------------------------------
; Reference Control Register Configuration
;----------------------------------------------------------------
	mov REF0CN, #000h	; Reference Control Register
;----------------------------------------------------------------
; ADC Configuration
;----------------------------------------------------------------
  mov AMX0CF, #060h	; AMUX Configuration Register
  mov AMX0SL, #000h	; AMUX Channel Select Register
  mov ADC0CF, #0F8h	; ADC0 Configuraion Register
  mov ADC0CN, #000h	; ADC Control Register
	
  mov ADC0LTH, #000h; ADC Less-Than High Byte Register
  mov ADC0LTL, #000h; ADC Less-Than Low Byte Register
  mov ADC0GTH, #0FFh; ADC Greater-Than High Byte Register
  mov ADC0GTL, #0FFh; ADC Greater-Than Low Byte Register
  mov AMX1SL, #000h ; AMUX1 Channel Select Register
  mov ADC1CF, #0F8h ; ADC1 Configuration Register
  mov ADC1CN, #000h ; ADC1 Control Register
;----------------------------------------------------------------
; DAC Configuration
;----------------------------------------------------------------
	mov DAC0CN, #000h	; DAC0 Control Register
	mov DAC0L, #000h	; DAC0 Low Byte Register
	mov DAC0H, #000h	; DAC0 High Byte Register
	mov DAC1CN, #000h	; DAC1 Control Register
	mov DAC1L, #000h	; DAC1 Low Byte Register
	mov DAC1H, #000h	; DAC1 High Byte Register
;----------------------------------------------------------------
; SPI Configuration
;----------------------------------------------------------------
	mov SPI0CN, #000h	; SPI Control Register
	mov SPI0CFG, #000h	; SPI Configuration Register
	mov SPI0CKR, #000h	; SPI Clock Rate Register
;----------------------------------------------------------------
; UART Configuration
;----------------------------------------------------------------
	mov SCON0, #000h    ; Serial Port 0 Control Register
	mov SADEN0, #000h   ; Serial 0 Slave Address Enable
	mov PCON, #000h     ; Power Control Register
	
	mov SCON1, #000h    ; Serial Port 1 Control Register
	mov SADEN1, #000h   ; Serial 1 Slave Address Enable
;----------------------------------------------------------------
; SMBus Configuration
;----------------------------------------------------------------
	mov SMB0CN, #000h	; SMBus Control Register
	mov SMB0ADR, #000h	; SMBus Address Register
	mov SMB0CR, #000h	; SMBus Clock Rate Register

;----------------------------------------------------------------
; PCA Configuration
;----------------------------------------------------------------
	mov PCA0MD, #000h   ; PCA Mode Register
	mov PCA0CN, #000h   ; PCA Control Register
	mov PCA0L, #000h    ; PCA Counter/Timer Low Byte
	mov PCA0H, #000h    ; PCA Counter/Timer High Byte 
	;Module 0
	mov PCA0CPM0, #000h	; PCA Capture/Compare Register 0
	mov PCA0CPL0, #000h	; PCA Counter/Timer Low Byte
	mov PCA0CPH0, #000h	; PCA Counter/Timer High Byte
	;Module 1
	mov PCA0CPM1, #000h	; PCA Capture/Compare Register 1
	mov PCA0CPL1, #000h	; PCA Counter/Timer Low Byte
	mov PCA0CPH1, #000h	; PCA Counter/Timer High Byte
	;Module 2
	mov PCA0CPM2, #000h	; PCA Capture/Compare Register 2
	mov PCA0CPL2, #000h	; PCA Counter/Timer Low Byte
	mov PCA0CPH2, #000h	; PCA Counter/Timer High Byte
	;Module 3
	mov PCA0CPM3, #000h	; PCA Capture/Compare Register 3
	mov PCA0CPL3, #000h	; PCA Counter/Timer Low Byte
	mov PCA0CPH3, #000h	; PCA Counter/Timer High Byte
	;Module 4
	mov PCA0CPM4, #000h	; PCA Capture/Compare Register 4
	mov PCA0CPL4, #000h	; PCA Counter/Timer Low Byte
	mov PCA0CPH4, #000h	; PCA Counter/Timer High Byte
;----------------------------------------------------------------
; Timer Configuration
;----------------------------------------------------------------
  
  mov CKCON, #000h  ; Clock Control Register
  mov TH0, #000h    ; Timer 0 High Byte
  mov TL0, #000h    ; Timer 0 Low Byte
  mov TH1, #000h    ; Timer 1 High Byte
  mov TL1, #000h    ; Timer 1 Low Byte
  mov TMOD, #000h   ; Timer Mode Register
  mov TCON, #000h   ; Timer Control Register 
  mov RCAP2H, #000h ; Timer 2 Capture Register High Byte
  mov RCAP2L, #000h ; Timer 2 Capture Register Low Byte
  mov TH2, #000h    ; Timer 2 High Byte	
  mov TL2, #000h    ; Timer 2 Low Byte	
  mov T2CON, #000h  ; Timer 2 Control Register	
		
  mov TMR3RLL, #000h; Timer 3 Reload Register Low Byte
  mov TMR3RLH, #000h; Timer 3 Reload Register High Byte
  mov TMR3H, #000h  ; Timer 3 High Byte
  mov TMR3L, #000h  ; Timer 3 Low Byte
  mov TMR3CN, #000h ; Timer 3 Control Register
	
  mov RCAP4H, #000h ; Timer 4 Capture Register High Byte
  mov RCAP4L, #000h ; Timer 4 Capture Register Low Byte
  mov TH4, #000h    ; Timer 4 High Byte
  mov TL4, #000h    ; Timer 4 Low Byte 
  mov T4CON, #000h  ; Timer 4 Control Register
;----------------------------------------------------------------
; Reset Source Configuration
;
; Bit 7  | Bit 6  | Bit 5  | Bit 4  | Bit 3 | Bit 2 | Bit 1 | Bit 0
;------------------------------------------------------------------     
;    R	 |   R/W  |  R/W   |  R/W   |   R   |   R   |  R/W  |  R
;------------------------------------------------------------------
;  JTAG  |Convert | Comp.0 | S/W    | WDT   | Miss. | POR   | HW
; Reset  |Start   | Reset/ | Reset  | Reset | Clock | Force | Pin
; Flag   |Reset/  | Enable | Force  | Flag  | Detect| &     | Reset
;        |Enable  | Flag   | &      |       | Flag  | Flag  | Flag
;        |Flag    |        | Flag   |       |       |       |
;------------------------------------------------------------------
; NOTE! : Comparator 0 must be enabled before it is enabled as a 
; reset source.
;
; NOTE! : External CNVSTR must be enalbed through the crossbar, and
; the crossbar enabled prior to enabling CNVSTR as a reset source 
;------------------------------------------------------------------
	mov RSTSRC, #000h	; Reset Source Register

;----------------------------------------------------------------
; Interrupt Configuration
;----------------------------------------------------------------
	mov IE, #000h		;Interrupt Enable
	mov IP, #000h		;Interrupt Priority
	mov EIE1, #000h		;Extended Interrupt Enable 1
	mov EIE2, #000h		;Extended Interrupt Enable 2
	mov EIP1, #000h		;Extended Interrupt Priority 1
	mov EIP2, #000h		;Extended Interrupt Priority 2
	
; other initialization code here...
;-----------------------------------------------------------------
; MAIN PROGRAM CODE
;-----------------------------------------------------------------
Main:
	; main code routines here...
END

• 1a. F021FULL.DAT для Config Wizard (ASM) — BLACKEAGLE   (20.03.2002 18:38, 28944 байт)