Отправлено PicoDev2 21 октября 2004 г. 06:53 В ответ на: Хороший вопрос, задайте им, контакт дать FAE? отправлено PicoDev2 21 октября 2004 г. 06:30

Security Bit page #105
The goal of the security bit is to prevent external access to the internal bus system. JTAG,
Fast Flash Programming and Flash Serial Test Interface features are disabled. Once set, this
bit can be reset only by an external hardware ERASE request to the chip. Refer to the product
definition section for the pin name that controls the ERASE. In this case, the full memory plane
is erased and all lock and general-purpose NVM bits are cleared. The security bit in the
MC_FSR is cleared only after these operations.
The activation sequence is:
• Start the Set Security Bit command (SSB) by writing the Flash Command Register.
• When the locking completes, the bit FRDY in the Flash Programming Status Register
(MC_FSR) rises. If an interrupt has been enabled by setting the bit FRDY in MC_FMR, the
interrupt line of the Memory Controller is activated.
When the security bit is active, the SECURITY bit in the MC_FSR is set.

• И правда ... — Ivan_   (21.10.2004 08:44, пустое)