Отправлено PicoDev 11 ноября 2003 г. 10:27 В ответ на: Спасибо, проверяю. отправлено Андрей Пр. 11 ноября 2003 г. 10:12

void HwInit(void)
{
byte i;
//i2c_Init();
DescriptorsInit();

//REVCTRL
REVCTL = 3;
//begin rest
GPIFTCB1 = 2;
GPIFTCB0 = 0;
//EP2GPIFPFSTOP = 1;
//EP4GPIFPFSTOP = 1;
//EP6GPIFPFSTOP = 1;
//EP8GPIFPFSTOP = 1;

//-----------------------
//PINFLAGS
// set_Byte(aPINFLAGS_BA,(FLAG_EP4EF<<4)|FLAG_EP2EF); //EP2=EMPTY, EP4=EMPTY
// set_Byte(aPINFLAGS_DC,(FLAG_EP8FF<<4)|FLAG_EP6FF); //EP4=FULL, EP8=FULL

set_Byte(aPINFLAGS_BA,0); //EP2=EMPTY, EP4=EMPTY
set_Byte(aPINFLAGS_DC,0); //EP4=FULL, EP8=FULL

//end test

//ChipFx2Init
//Ports Init
PortE_init();
PowerOn(bmD33VEN | bmD15VEN);
//===================
//RevCtrl: b1=DYN_OUT=1,b0=ENH_PKT=1
//set_Byte(aREVCTL,(bm1|bm0)); //
//------------------------------------------------------------------------
//TODO check later!!! When =1, Works for arming by writing EP0BCL
SUDPTRCTL = 1; //SDPAUTO=1 must be =1 !!!
EP0BCH = 0;
//AUTOPTRSETUP |= 0x01;
//------------------------------------------------------------------------
//0,0,b5=PORTCSTB,{[b4=CLKSPD1,b3=CLKSPD0] 0=12,1=24,2=48MHz},b2=CLKINV,b1=CLKOE,8051RES-read
CPUCS = bm4|bm1;//CLKOE-enable, 48 MHz
//------------------------------------------------------------------------
//IFCONFIG
//b7=IFCLKSRC(1=internal) b6=3048MHZ(1=48MHz) b5=IFCLKOE b4=IFCLKPOL
//b3=ASYNC b2=GSTATE [b1=IFCFG1 b0=IFCFG0]={00=ports,11=slave FIFO}
//IFCONFIG = bm6|bm1|bm0; //slave fifo, synch,
//IFCONFIG = bm6; //tmp settings, ports, synch,

//IFCONFIG = bm7|bm6|bm5|bm1|bm0; //CLK=48MHz
//IFCONFIG = bm7|bm5|bm1|bm0; //CLK=30MHz

IFCONFIG = bm1|bm0; //CLK=Extern
//-----------------------
//---------------------------------------------
//VALID,0,[TYPE1,TYPE0]={10=BULK,11=INTR}, 0, 0, 0, 0
set_Byte(aEP1OUTCFG,(bm7|bm5)); //BULK;
set_Byte(aEP1INCFG,(bm7|bm5)); //BULK;

//VALID, DIR, [TYPE1 TYPE0]={01=ISO,10=BULK,11=INTR},
//SIZE{0=512,1=1024}, 0, [BUF1,BUF0]={00=quad,10=double,11=triple}
set_Byte(aEP2CFG,(EPCFG_VALID | EPCFG_OUT | EPCFG_BULK | EPCFG_512 | EPCFG_DOUBLE));//0xA2

set_Byte(aEP4CFG,(EPCFG_VALID | EPCFG_OUT | EPCFG_BULK | EPCFG_512 | EPCFG_DOUBLE));//0xA0

set_Byte(aEP6CFG,(EPCFG_VALID | EPCFG_IN | EPCFG_BULK | EPCFG_512 | EPCFG_DOUBLE));//0xE2

set_Byte(aEP8CFG,(EPCFG_VALID | EPCFG_IN | EPCFG_BULK | EPCFG_512 | EPCFG_DOUBLE));//0xE0
//-----------------------
//EPxFIFOCFG
//E61A 1 EP6FIFOCFG[6]
//0 INFM1 OEP1 AUTOOUT AUTOIN ZEROLENIN 0 WORDWIDE 00000101
//bm7=0, bm6={INFM1=1}, bm5={OEP1=0}, bm4={AUTOOUT=0}
//bm3={AUTOIN=1}, bm2={ZEROLENIN=1}, bm1=0, bm0={WORDWIDE=1}
set_Byte(aEP2FIFOCFG,(bm6|bm5|bm4|bm3|bm2|bm0));//EP2OUT
set_Byte(aEP4FIFOCFG,(bm6|bm5|bm4|bm3|bm2|bm0));//EP4OUT
set_Byte(aEP6FIFOCFG,(bm6|bm5|bm4|bm3|bm2|bm0));//EP6IN+30MHz=works nice
set_Byte(aEP8FIFOCFG,(bm6|bm5|bm4|bm3|bm2|bm0));//EP8IN

//set_Byte(aEP2FIFOCFG,(bm4|bm3|bm2|bm0));//EP2OUT
//set_Byte(aEP4FIFOCFG,(bm4|bm3|bm2|bm0));//EP4OUT
//set_Byte(aEP6FIFOCFG,(bm4|bm3|bm2|bm0));//EP6IN
//set_Byte(aEP8FIFOCFG,(bm4|bm3|bm2|bm0));//EP8IN

//-----------------------
//FIFOPINPOLAR
//0 0 PKTEND SLOE SLRD SLWR EF FF
set_Byte(aFIFOPINPOLAR,0);//default
// set_Byte(aFIFOPINPOLAR,3);
//-----------------------
//EPxFIFOPF
//skip
//-----------------------
//PORTACFG
//FLAGD SLCS 0 0 0 0 INT1 INT0
PORTACFG = bm7; //SLCS=0 always 0
//-----------------------
//INPKTEND
//OUTKTEND
//see framework
//-----------------------
//EPxFIFOIE
//0 0 0 0 EDGEPF PF EF FF
//no interrupts, default=0
//EP2FIFOIE
//EP4FIFOIE
//EP6FIFOIE
//EP8FIFOIE
//-----------------------
//EPxFIFOIRG
//see framework
//-----------------------
//EPxFIFOFLGS read only
//see framework
//-----------------------
//FIFORESET
//NAKALL 0 0 0 EP3 EP2 EP1 EP0
//EP2468FifoReset(0xF); //reset all FIFO
//EP2468FifoReset(0xF); //reset all FIFO
//-----------------------
set_HL(aEP2AUTOINLENH,512);
set_HL(aEP4AUTOINLENH,512);
set_HL(aEP6AUTOINLENH,512);
set_HL(aEP8AUTOINLENH,512);
//-----------------------
for(i=0;i<4;i++){
EP2468FifoReset(bm0); //reset EP2
EP2468FifoReset(bm1); //reset EP4
EP2468FifoReset(bm2); //reset EP6
EP2468FifoReset(bm3); //reset EP8
}
//-----------------------
set_wEP2BC(512);
set_wEP4BC(512);
set_wEP6BC(512);
set_wEP8BC(512);

set_Byte(aINPKTEND,0x86);
//-----------------------

gUsbStatus_Init(0); //full speed

//enable intrrrupts ======================
//fifo
//EP2FIFOIE

//INTSETUP:0, 0, 0, 0, b3=AV2EN, 0, b1=INT4SRC(1=FIFO/GPIF), b0=AV4EN
INTSETUP = (bm3|bm1|bm0); //enable autovectoring

//IE settings
//TODO IE settings later

//EIE settings
IrqFifoEnable();
IrqUsbEnable();

Ser0Init();
IrqSer0Enable();

btIsr_SUDAV = 0;
Irq_SUDAV_Enable();
Irq_SOF_Enable();
Irq_SUTOK_Enable();
Irq_USBRESET_Enable();
Irq_HSGRANT_Enable();

Irq_SUSPEND_Enable();

IrqEnable();

if(!is_bmRENUM()){
//puts("\r\nRenum starts...");

UsbDisconnect(1); //disconnect and renumerate
//UsbDisconnect(0); //disconnect and no renumerate
//puts("Renum finished");
}

IrqEnable();

//-------UsbConnect();// USBCS &=~bm3;