"4.5.1 MUL, MLA, and MLS
Multiply, Multiply-Accumulate, and Multiply-Subtract, with signed or unsigned 32-bit
operands, giving the least significant 32 bits of the result.
Syntax
MUL{S}{cond} {Rd}, Rn, Rm
MLA{S}{cond} Rd, Rn, Rm, Ra
MLS{cond} Rd, Rn, Rm, Ra
where:
cond is an optional condition code (see Conditional execution on page 2-17).
S is an optional suffix. If S is specified, the condition code flags are updated
on the result of the operation (see Conditional execution on page 2-17).
Rd is the destination register.
Rn, Rm are registers holding the values to be multiplied.
Ra is a register holding the value to be added or subtracted from.

Usage
The MUL instruction multiplies the values from Rn and Rm, and places the least significant
32 bits of the result in Rd.
The MLA instruction multiplies the values from Rn and Rm, adds the value from Ra, and
places the least significant 32 bits of the result in Rd.
The MLS instruction multiplies the values from Rn and Rm, subtracts the result from the
value from Ra, and places the least significant 32 bits of the final result in Rd.
Do not use r15 for Rd, Rn, Rm, or Ra."

Copyright © 2007 ARM Limited. ARM DUI 0379A