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(«Телесистемы»: Конференция «Микроконтроллеры и их применение»)

миниатюрный аудио-видеорекордер mAVR

Отправлено Тумблер 02 октября 2002 г. 13:20
В ответ на: IAR with ATmega128. отправлено L 01 октября 2002 г. 21:19

/* - iom128.h -

This file #defines the internal register addresses for ATMEGA128.
Used with ICCA90 and AA90.

*/
// ------------------------------------------------------------------
// этот файл сделан из iom103.h 04.06.02
// ------------------------------------------------------------------

#pragma language=extended

#if (((__TID__ >> 8) & 0x7F) != 90)
#error This file should only be compiled by icca90/aa90
#endif
#if (((__TID__ >> 4) & 0x0F) != 3)
#error This file should only be included if the processor option is -v3
#endif

/* Include the SFR part if this file has not been included before,
* OR this file is included by the assembler (SFRs must be defined in
* each assembler module). AA90 has __TID__ bit 15 = 0. */
#if !defined(__IOM128_INCLUDED) || ((__TID__ >> 15) == 0)

/*==========================*/
/* Predefined SFR Addresses */
/*==========================*/

/* Input Pins, Port F */
sfrb PINF = 0x00;

/* Input Pins, Port E */
sfrb PINE = 0x01;

/* Data Direction Register, Port E */
sfrb DDRE = 0x02;

/* Data Register, Port E */
sfrb PORTE = 0x03;

/* ADC Low Byte */
sfrw ADC = 0x04;
sfrb ADCL = 0x04;
sfrb ADCH = 0x05;

/* ADC SR */
//sfrb ADCSR = 0x06;
sfrb ADCSRA = 0x06;

/* ADC MUX */
sfrb ADMUX = 0x07;

/* Analog Comparator Control and Status Register */
sfrb ACSR = 0x08;

/* UART0 Baud Rate Register */
//sfrb UBRR = 0x09;
sfrb UBRR0L = 0x09;

/* UART Control Register */
//sfrb UCR = 0x0A;
sfrb UCSR0B = 0x0A;

/* UART Status Register */
//sfrb USR = 0x0B;
sfrb UCSR0A = 0x0B;

/* UART I/O Data Register */
//sfrb UDR = 0x0C;
sfrb UDR0 = 0x0C;

/* SPI Control Register */
sfrb SPCR = 0x0D;

/* SPI Status Register */
sfrb SPSR = 0x0E;

/* SPI I/O Data Register */
sfrb SPDR = 0x0F;

/* Input Pins, Port D */
sfrb PIND = 0x10;

/* Data Direction Register, Port D */
sfrb DDRD = 0x11;

/* Data Register, Port D */
sfrb PORTD = 0x12;

/* Input Pins, Port C */
sfrb PINC = 0x13;

/* Data Direction Register, Port C */
sfrb DDRC = 0x14;

/* Data Register, Port C */
sfrb PORTC = 0x15;

/* Input Pins, Port B */
sfrb PINB = 0x16;

/* Data Direction Register, Port B */
sfrb DDRB = 0x17;

/* Data Register, Port B */
sfrb PORTB = 0x18;

/* Input Pins, Port A */
sfrb PINA = 0x19;

/* Data Direction Register, Port A */
sfrb DDRA = 0x1A;

/* Data Register, Port A */
sfrb PORTA = 0x1B;

/* EEPROM Control Register */
sfrb EECR = 0x1C;

/* EEPROM Data Register */
sfrb EEDR = 0x1D;

/* EEPROM Address Register */
sfrw EEAR = 0x1E;
sfrb EEARL = 0x1E;
sfrb EEARH = 0x1F;

sfrb SFIOR = 0x20;

/* Watchdog Timer Control Register */
sfrb WDTCR = 0x21;

sfrb OCDR = 0x22;

/* Timer2 Output Compare Register */
sfrb OCR2 = 0x23;

/* Timer 2 */
sfrb TCNT2 = 0x24;

/* Timer2 Control register */
sfrb TCCR2 = 0x25;

/* T/C 1 Input Capture Register */
sfrw ICR1 = 0x26;
sfrb ICR1L = 0x26;
sfrb ICR1H = 0x27;

/* Timer/Counter1 Output Compare Register B */
sfrw OCR1B = 0x28;
sfrb OCR1BL = 0x28;
sfrb OCR1BH = 0x29;

/* Timer/Counter1 Output Compare Register A */
sfrw OCR1A = 0x2A;
sfrb OCR1AL = 0x2A;
sfrb OCR1AH = 0x2B;

/* Timer/Counter 1 */
sfrw TCNT1 = 0x2C;
sfrb TCNT1L = 0x2C;
sfrb TCNT1H = 0x2D;

/* Timer/Counter 1 Control and Status Register */
sfrb TCCR1B = 0x2E;

/* Timer/Counter 1 Control Register */
sfrb TCCR1A = 0x2F;

/* Timer/Counter 0 Asynchronous Control & Status Register */
sfrb ASSR = 0x30;

/* Output Compare Register 0 */
sfrb OCR0 = 0x31;

/* Timer/Counter 0 */
sfrb TCNT0 = 0x32;

/* Timer/Counter 0 Control Register */
sfrb TCCR0 = 0x33;

/* MCUSR */
//sfrb MCUSR = 0x34;
sfrb MCUCSR = 0x34;

/* MCU general Control Register */
sfrb MCUCR = 0x35;

/* TBD fix this comment */
sfrb TIFR = 0x36;

/* Timer/Counter Interrupt MaSK register */
sfrb TIMSK = 0x37;

/* EIFR */
sfrb EIFR = 0x38;

/* External Interrupt MaSK register */
sfrb EIMSK = 0x39;

/* EICR */
//sfrb EICR = 0x3A;
sfrb EICRB = 0x3A;

/* RAMPZ */
sfrb RAMPZ = 0x3B;

/* XDIV */
sfrb XDIV = 0x3C;

/* Stack Pointer */
sfrw SP = 0x3D;
sfrb SPL = 0x3D;
sfrb SPH = 0x3E;

/* Status REGister */
sfrb SREG = 0x3F;

// vvvvvvvvvvvvvvvvvvvvvvvvvvvvvv порты "только как ячейки памяти"
#define DDRF *((char *)0x61)
#define PORTF *((char *)0x62)
#define PING *((char *)0x63)
#define DDRG *((char *)0x64)
#define PORTG *((char *)0x65)

#define SPMCSR *((char *)0x68)

#define EICRA *((char *)0x6A)

#define XMCRB *((char *)0x6C)
#define XMCRA *((char *)0x6D)

#define OSCCAL *((char *)0x6F)
#define TWBR *((char *)0x70)
#define TWSR *((char *)0x71)
#define TWAR *((char *)0x72)
#define TWDR *((char *)0x73)
#define TWCR *((char *)0x74)

#define OCR1CL *((char *)0x78)
#define OCR1CH *((char *)0x79)
#define TCCR1C *((char *)0x7A)

#define ETIFR *((char *)0x7C)
#define ETIMSK *((char *)0x7D)

#define ICR3L *((char *)0x80)
#define ICR3H *((char *)0x81)
#define OCR3CL *((char *)0x82)
#define OCR3CH *((char *)0x83)
#define OCR3BL *((char *)0x84)
#define OCR3BH *((char *)0x85)
#define OCR3AL *((char *)0x86)
#define OCR3AH *((char *)0x87)
#define TCNT3L *((char *)0x88)
#define TCNT3H *((char *)0x89)
#define TCCR3B *((char *)0x8A)
#define TCCR3A *((char *)0x8B)
#define TCCR3C *((char *)0x8C)

#define UBRR0H *((char *)0x90)

#define UCSR0C *((char *)0x95)

#define UBRR1H *((char *)0x98)
#define UBRR1L *((char *)0x99)
#define UCSR1B *((char *)0x9A)
#define UCSR1A *((char *)0x9B)
#define UDR1 *((char *)0x9C)
#define UCSR1C *((char *)0x9D)
// ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ порты "только как ячейки памяти"

// vvvvvvvvvvvvvvvvvvvvvvvvvvvvvv описание некоторых бит

// маски флагов регистра PINF :
#define PINF7 (1<<7)
#define PINF6 (1<<6)
#define PINF5 (1<<5)
#define PINF4 (1<<4)
#define PINF3 (1<<3)
#define PINF2 (1<<2)
#define PINF1 (1<<1)
#define PINF0 (1<<0)

// маски флагов регистра PINE :
#define PINE7 (1<<7)
#define PINE6 (1<<6)
#define PINE5 (1<<5)
#define PINE4 (1<<4)
#define PINE3 (1<<3)
#define PINE2 (1<<2)
#define PINE1 (1<<1)
#define PINE0 (1<<0)

// маски флагов регистра DDRE :
#define DDE7 (1<<7)
#define DDE6 (1<<6)
#define DDE5 (1<<5)
#define DDE4 (1<<4)
#define DDE3 (1<<3)
#define DDE2 (1<<2)
#define DDE1 (1<<1)
#define DDE0 (1<<0)

// маски флагов регистра PORTE :
#define PORTE7 (1<<7)
#define PORTE6 (1<<6)
#define PORTE5 (1<<5)
#define PORTE4 (1<<4)
#define PORTE3 (1<<3)
#define PORTE2 (1<<2)
#define PORTE1 (1<<1)
#define PORTE0 (1<<0)

// маски флагов регистра ADCSRA :
#define ADEN (1<<7)
#define ADSC (1<<6)
#define ADRF (1<<5)
#define ADIF (1<<4)
#define ADIE (1<<3)
#define ADPS2 (1<<2)
#define ADPS1 (1<<1)
#define ADPS0 (1<<0)

// маски флагов регистра ADMUX :
#define REFS1 (1<<7)
#define REFS0 (1<<6)
#define ADLAR (1<<5)
#define MUX4 (1<<4)
#define MUX3 (1<<3)
#define MUX2 (1<<2)
#define MUX1 (1<<1)
#define MUX0 (1<<0)

// маски флагов регистра ACSR :
#define ACD (1<<7)
#define ACBG (1<<6)
#define ACO (1<<5)
#define ACI (1<<4)
#define ACIE (1<<3)
#define ACIC (1<<2)
#define ACIS1 (1<<1)
#define ACIS0 (1<<0)

// маски флагов регистра UCSR.B :
#define RXCIE (1<<7)
#define TXCIE (1<<6)
#define UDRIE (1<<5)
#define RXEN (1<<4)
#define TXEN (1<<3)
#define UCSZ02 (1<<2)
#define RXB8 (1<<1)
#define TXB8 (1<<0)

// маски флагов регистра UCSR.A :
#define RXC (1<<7) /* RxC FLAG */
#define TXC (1<<6) /* TxC FLAG */
#define UDRE (1<<5)
#define TXE UDRE /* TxE FLAG */
#define FE (1<<4)
#define DOR (1<<3)
#define UPE (1<<2)
#define U2X (1<<1)
#define MPCM (1<<0)

// маски флагов регистра SPCR :
#define SPIE (1<<7)
#define SPE (1<<6)
#define DORD (1<<5)
#define MSTR (1<<4)
#define CPOL (1<<3)
#define CPHA (1<<2)
#define SPR1 (1<<1)
#define SPR0 (1<<0)

// маски флагов регистра SPSR :
#define SPIF (1<<7)
#define WCOL (1<<6)
#define SPI2X (1<<0)

// маски флагов регистра PIND :
#define PIND7 (1<<7)
#define PIND6 (1<<6)
#define PIND5 (1<<5)
#define PIND4 (1<<4)
#define PIND3 (1<<3)
#define PIND2 (1<<2)
#define PIND1 (1<<1)
#define PIND0 (1<<0)

// маски флагов регистра DDRD :
#define DDD7 (1<<7)
#define DDD6 (1<<6)
#define DDD5 (1<<5)
#define DDD4 (1<<4)
#define DDD3 (1<<3)
#define DDD2 (1<<2)
#define DDD1 (1<<1)
#define DDD0 (1<<0)

// маски флагов регистра PORTD :
#define PORTD7 (1<<7)
#define PORTD6 (1<<6)
#define PORTD5 (1<<5)
#define PORTD4 (1<<4)
#define PORTD3 (1<<3)
#define PORTD2 (1<<2)
#define PORTD1 (1<<1)
#define PORTD0 (1<<0)

// маски флагов регистра PINC :
#define PINC7 (1<<7)
#define PINC6 (1<<6)
#define PINC5 (1<<5)
#define PINC4 (1<<4)
#define PINC3 (1<<3)
#define PINC2 (1<<2)
#define PINC1 (1<<1)
#define PINC0 (1<<0)

// маски флагов регистра DDRC :
#define DDC7 (1<<7)
#define DDC6 (1<<6)
#define DDC5 (1<<5)
#define DDC4 (1<<4)
#define DDC3 (1<<3)
#define DDC2 (1<<2)
#define DDC1 (1<<1)
#define DDC0 (1<<0)

// маски флагов регистра PORTC :
#define PORTC7 (1<<7)
#define PORTC6 (1<<6)
#define PORTC5 (1<<5)
#define PORTC4 (1<<4)
#define PORTC3 (1<<3)
#define PORTC2 (1<<2)
#define PORTC1 (1<<1)
#define PORTC0 (1<<0)

// маски флагов регистра PINB :
#define PINB7 (1<<7)
#define PINB6 (1<<6)
#define PINB5 (1<<5)
#define PINB4 (1<<4)
#define PINB3 (1<<3)
#define PINB2 (1<<2)
#define PINB1 (1<<1)
#define PINB0 (1<<0)

// маски флагов регистра DDRB :
#define DDB7 (1<<7)
#define DDB6 (1<<6)
#define DDB5 (1<<5)
#define DDB4 (1<<4)
#define DDB3 (1<<3)
#define DDB2 (1<<2)
#define DDB1 (1<<1)
#define DDB0 (1<<0)

// маски флагов регистра PORTB :
#define PORTB7 (1<<7)
#define PORTB6 (1<<6)
#define PORTB5 (1<<5)
#define PORTB4 (1<<4)
#define PORTB3 (1<<3)
#define PORTB2 (1<<2)
#define PORTB1 (1<<1)
#define PORTB0 (1<<0)

// маски флагов регистра PINA :
#define PINA7 (1<<7)
#define PINA6 (1<<6)
#define PINA5 (1<<5)
#define PINA4 (1<<4)
#define PINA3 (1<<3)
#define PINA2 (1<<2)
#define PINA1 (1<<1)
#define PINA0 (1<<0)

// маски флагов регистра DDRA :
#define DDA7 (1<<7)
#define DDA6 (1<<6)
#define DDA5 (1<<5)
#define DDA4 (1<<4)
#define DDA3 (1<<3)
#define DDA2 (1<<2)
#define DDA1 (1<<1)
#define DDA0 (1<<0)

// маски флагов регистра PORTA :
#define PORTA7 (1<<7)
#define PORTA6 (1<<6)
#define PORTA5 (1<<5)
#define PORTA4 (1<<4)
#define PORTA3 (1<<3)
#define PORTA2 (1<<2)
#define PORTA1 (1<<1)
#define PORTA0 (1<<0)

// маски флагов регистра EECR :
#define EERIE (1<<3)
#define EEMWE (1<<2)
#define EEWE (1<<1)
#define EERE (1<<0)

// маски флагов регистра SFIOR :
#define TSM (1<<7)
#define ADHSM (1<<4)
#define ACME (1<<3)
#define PUD (1<<2)
#define PSR0 (1<<1)
#define PSR321 (1<<0)

// маски флагов регистра WDTCR :
#define WDCE (1<<4)
#define WDE (1<<3)
#define WDP2 (1<<2)
#define WDP1 (1<<1)
#define WDP0 (1<<0)

// маски флагов регистра OCDR :
#define IDRD (1<<7)
#define OCDR7 (1<<7)
#define OCDR6 (1<<6)
#define OCDR5 (1<<5)
#define OCDR4 (1<<4)
#define OCDR3 (1<<3)
#define OCDR2 (1<<2)
#define OCDR1 (1<<1)
#define OCDR0 (1<<0)

// маски флагов регистра TCCR2 :
#define FOC2 (1<<7)
#define WGM20 (1<<6)
#define COM21 (1<<5)
#define COM20 (1<<4)
#define WGM21 (1<<3)
#define GS22 (1<<2)
#define GS21 (1<<1)
#define GS20 (1<<0)

// маски флагов регистра TCCR1B :
#define ICNC1 (1<<7)
#define ICES1 (1<<6)
#define WGM13 (1<<4)
#define WGM12 (1<<3)
#define CS12 (1<<2)
#define CS11 (1<<1)
#define CS10 (1<<0)

// маски флагов регистра TCCR1A :
#define COM1A1 (1<<7)
#define COM1A0 (1<<6)
#define COM1B1 (1<<5)
#define COM1B0 (1<<4)
#define COM1C1 (1<<3)
#define COM1C0 (1<<2)
#define WGM11 (1<<1)
#define WGM10 (1<<0)

// маски флагов регистра ASSR :
#define AS0 (1<<3)
#define TCN0UB (1<<2)
#define OCR0UB (1<<1)
#define TCR0UB (1<<0)

// маски флагов регистра TCCR0 :
#define FOC0 (1<<7)
#define WGM00 (1<<6)
#define COM01 (1<<5)
#define COM00 (1<<4)
#define WGM01 (1<<3)
#define CS02 (1<<2)
#define CS01 (1<<1)
#define CS00 (1<<0)

// маски флагов регистра MCUCSR :
#define JTD (1<<7)
#define JTRF (1<<4)
#define WDRF (1<<3)
#define BORF (1<<2)
#define EXTRF (1<<1)
#define PORF (1<<0)

// маски флагов регистра MCUCR :
#define SRE (1<<7)
#define SRW10 (1<<6)
#define SE (1<<5)
#define SM1 (1<<4)
#define SM0 (1<<3)
#define SM2 (1<<2)
#define IVSEL (1<<1)
#define IVCE (1<<0)

// маски флагов регистра TIFR :
#define OCF2 (1<<7)
#define TOV2 (1<<6)
#define ICF1 (1<<5)
#define OCF1A (1<<4)
#define OCF1B (1<<3)
#define TOV1 (1<<2)
#define OCF0 (1<<1)
#define TOV0 (1<<0)

// маски флагов регистра TIMSK :
#define OCIE2 (1<<7)
#define TOIE2 (1<<6)
#define TICIE1 (1<<5)
#define OCIE1A (1<<4)
#define OCIE1B (1<<3)
#define TOIE1 (1<<2)
#define OCIE0 (1<<1)
#define TOIE0 (1<<0)

// маски флагов регистра EIFR :
#define INTF7 (1<<7)
#define INTF6 (1<<6)
#define INTF5 (1<<5)
#define INTF4 (1<<4)
#define INTF3 (1<<3)
#define INTF2 (1<<2)
#define INTF1 (1<<1)
#define INTF0 (1<<0)

// маски флагов регистра EIMSK :
#define INT7 (1<<7)
#define INT6 (1<<6)
#define INT5 (1<<5)
#define INT4 (1<<4)
#define INT3 (1<<3)
#define INT2 (1<<2)
#define INT1 (1<<1)
#define INT0 (1<<0)

// маски флагов регистра EICRB :
#define ICS71 (1<<7)
#define ICS70 (1<<6)
#define ICS61 (1<<5)
#define ICS60 (1<<4)
#define ICS51 (1<<3)
#define ICS50 (1<<2)
#define ICS41 (1<<1)
#define ICS40 (1<<0)

// маски флагов регистра RAMPZ :
#define RAMPZ0 (1<<0)

// маски флагов регистра XDIV :
#define XDIVEN (1<<7)
#define XDIV6 (1<<6)
#define XDIV5 (1<<5)
#define XDIV4 (1<<4)
#define XDIV3 (1<<3)
#define XDIV2 (1<<2)
#define XDIV1 (1<<1)
#define XDIV0 (1<<0)

// маски флагов регистра SPL :
#define SP7 (1<<7)
#define SP6 (1<<6)
#define SP5 (1<<5)
#define SP4 (1<<4)
#define SP3 (1<<3)
#define SP2 (1<<2)
#define SP1 (1<<1)
#define SP0 (1<<0)

// маски флагов регистра SPH :
#define SP15 (1<<7)
#define SP14 (1<<6)
#define SP13 (1<<5)
#define SP12 (1<<4)
#define SP11 (1<<3)
#define SP10 (1<<2)
#define SP9 (1<<1)
#define SP8 (1<<0)

// маски флагов регистра SREG :
#define I (1<<7)
#define T (1<<6)
#define H (1<<5)
#define S (1<<4)
#define V (1<<3)
#define N (1<<2)
#define Z (1<<1)
#define C (1<<0)

// маски флагов регистра DDRF :
#define DDF7 (1<<7)
#define DDF6 (1<<6)
#define DDF5 (1<<5)
#define DDF4 (1<<4)
#define DDF3 (1<<3)
#define DDF2 (1<<2)
#define DDF1 (1<<1)
#define DDF0 (1<<0)

// маски флагов регистра PORTF :
#define PORTF7 (1<<7)
#define PORTF6 (1<<6)
#define PORTF5 (1<<5)
#define PORTF4 (1<<4)
#define PORTF3 (1<<3)
#define PORTF2 (1<<2)
#define PORTF1 (1<<1)
#define PORTF0 (1<<0)

// маски флагов регистра PING :
#define PING4 (1<<4)
#define PING3 (1<<3)
#define PING2 (1<<2)
#define PING1 (1<<1)
#define PING0 (1<<0)

// маски флагов регистра DDRG :
#define DDG4 (1<<4)
#define DDG3 (1<<3)
#define DDG2 (1<<2)
#define DDG1 (1<<1)
#define DDG0 (1<<0)

// маски флагов регистра PORTG :
#define PORTG4 (1<<4)
#define PORTG3 (1<<3)
#define PORTG2 (1<<2)
#define PORTG1 (1<<1)
#define PORTG0 (1<<0)

// маски флагов регистра SPMCSR :
#define SPMIE (1<<7)
#define RWWSB (1<<6)
#define RWWSRE (1<<4)
#define BLBSET (1<<3)
#define PGWRT (1<<2)
#define PGERS (1<<1)
#define SPMEN (1<<0)

// маски флагов регистра EICRA :
#define ISC31 (1<<7)
#define ISC30 (1<<6)
#define ISC21 (1<<5)
#define ISC20 (1<<4)
#define ISC11 (1<<3)
#define ISC10 (1<<2)
#define ISC01 (1<<1)
#define ISC00 (1<<0)

// маски флагов регистра XMCRB :
#define XMBK (1<<7)
#define XMM2 (1<<2)
#define XMM1 (1<<1)
#define XMM0 (1<<0)

// маски флагов регистра XMCRA :
#define SRL2 (1<<6)
#define SRL1 (1<<5)
#define SRL0 (1<<4)
#define SRW01 (1<<3)
#define SRW00 (1<<2)
#define SRW11 (1<<1)

// маски флагов регистра TWSR :
#define TWS7 (1<<7)
#define TWS6 (1<<6)
#define TWS5 (1<<5)
#define TWS4 (1<<4)
#define TWS3 (1<<3)
#define TWS1 (1<<1)
#define TWS0 (1<<0)

// маски флагов регистра TWAR :
#define TWA6 (1<<7)
#define TWA5 (1<<6)
#define TWA4 (1<<5)
#define TWA3 (1<<4)
#define TWA2 (1<<3)
#define TWA1 (1<<2)
#define TWA0 (1<<1)
#define TWGCE (1<<0)

// маски флагов регистра TWCR :
#define TWINT (1<<7)
#define TWEA (1<<6)
#define TWSTA (1<<5)
#define TWSTO (1<<4)
#define TWWC (1<<3)
#define TWEN (1<<2)
#define TWIE (1<<0)

// маски флагов регистра TCCR1C :
#define FOC1A (1<<7)
#define FOC1B (1<<6)
#define FOC1C (1<<5)

// маски флагов регистра ETIFR :
#define ICF3 (1<<5)
#define OCF3A (1<<4)
#define OCF3B (1<<3)
#define TOV3 (1<<2)
#define OCF3C (1<<1)
#define OCF1C (1<<0)

// маски флагов регистра ETIMSK :
#define TICIE3 (1<<5)
#define OCIE3A (1<<4)
#define OCIE3B (1<<3)
#define TOIE3 (1<<2)
#define OCIE3C (1<<1)
#define OCIE1C (1<<0)

// маски флагов регистра TCCR3B :
#define ICNC3 (1<<7)
#define ICES3 (1<<6)
#define WGM33 (1<<4)
#define WGM32 (1<<3)
#define CS32 (1<<2)
#define CS31 (1<<1)
#define CS30 (1<<0)

// маски флагов регистра TCCR3A :
#define COM3A1 (1<<7)
#define COM3A0 (1<<6)
#define COM3B1 (1<<5)
#define COM3B0 (1<<4)
#define COM3C1 (1<<3)
#define COM3C0 (1<<2)
#define WGM31 (1<<1)
#define WGM30 (1<<0)

// маски флагов регистра TCCR3C :
#define FOC3A (1<<7)
#define FOC3B (1<<6)
#define FOC3C (1<<5)

// маски флагов регистра UCSR.C :
#define UMSEL (1<<6)
#define UPM1 (1<<5)
#define UPM0 (1<<4)
#define USBS (1<<3)
#define UCSZ1 (1<<2)
#define UCSZ0 (1<<1)
#define UCPOL (1<<0)

// ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ описание некоторых бит

#ifndef __IOM128_INCLUDED
#define __IOM128_INCLUDED

/* SFRs are local in assembler modules (so this file may need to be */
/* included in more than one module in the same source file), */
/* but #defines must only be made once per source file. */

/*==============================*/
/* Interrupt Vector Definitions */
/*==============================*/

/* NB! vectors are specified as byte addresses */

#define RESET_vect (0x00)
#define INT0_vect (0x04)
#define INT1_vect (0x08)
#define INT2_vect (0x0C)
#define INT3_vect (0x10)
#define INT4_vect (0x14)
#define INT5_vect (0x18)
#define INT6_vect (0x1C)
#define INT7_vect (0x20)
#define TIMER2_COMP_vect (0x24)
#define TIMER2_OVF_vect (0x28)
#define TIMER1_CAPT_vect (0x2C)
#define TIMER1_COMPA_vect (0x30)
#define TIMER1_COMPB_vect (0x34)
#define TIMER1_OVF_vect (0x38)
#define TIMER0_COMP_vect (0x3C)
#define TIMER0_OVF_vect (0x40)
#define SPI_STC_vect (0x44)
#define USART0_RXC_vect (0x48)
#define USART0_UDRE_vect (0x4C)
#define USART0_TXC_vect (0x50)
#define ADC_vect (0x54)
#define EE_RDY_vect (0x58)
#define ANA_COMP_vect (0x5C)

#define TIM1_COMPC_vect (0x60)
#define TIM3_CAPT_vect (0x64)
#define TIM3_COMPA_vect (0x68)
#define TIM3_COMPB_vect (0x6C)
#define TIM3_COMPC_vect (0x70)
#define TIM3_OVF_vect (0x74)
#define USART1_RXC_vect (0x78)
#define USART1_UDRE_vect (0x7C)
#define USART1_TXC_vect (0x80)
#define TWI_vect (0x84)
#define SPM_RDY_vect (0x88)

#endif /* __IOM128_INCLUDED (define part) */
#endif /* __IOM128_INCLUDED (SFR part) */


Это .xcl:


-! - lnk3s.xcl -

XLINK command file for the ICCA90 C-compiler using the -v3, -ms options.
Segments are defined for a generic AT90S with a maximum of
64 Kbytes data address space and 128 Kbytes program address space.

Usage: xlink your_file(s) -f lnk3s

File version: $Revision: 1.12 $

The following segments are used by the compiler:

Program address space read only segments (internal Flash)
=========================================================
segment address range max size (dec) used with compiler options
------- ------------- -------------- --------------------------
INTVEC 0 - 1F 32 bytes -e ("interrupt" keyword)
RCODE 20 - FFF 4 Kbytes
SWITCH 20 - FFFF 64 Kbytes
FLASH 20 - FFFF 64 Kbytes -e ("flash" keyword)
CDATA0 20 - 1FFFF 128 Kbytes -e ("tiny" keyword)
CDATA1 20 - 1FFFF 128 Kbytes (if -y then const objects)
CCSTR 20 - 1FFFF 128 Kbytes -y
CODE 20 - 1FFFF 128 Kbytes

Data address space read only segments (external PROM)
=====================================================
segment address range max size (dec) used with compiler options
------- ------------- -------------- --------------------------
CONST ? - FFFF 64 Kbytes Not -y
CSTR ? - FFFF 64 Kbytes Not -y

Data address space read/write segments
==============================================================
segment address range max size (dec) used with compiler options
------- ------------- -------------- --------------------------
UDATA0 60 - FF 224 bytes -e ("tiny" keyword)
IDATA0 60 - FF 224 bytes -e ("tiny" keyword)
RSTACK 60 - FFFF 64 Kbytes
CSTACK 60 - FFFF 64 Kbytes
UDATA1 60 - FFFF 64 Kbytes
IDATA1 60 - FFFF 64 Kbytes (if -y then const objects)
ECSTR 60 - FFFF 64 Kbytes -y

Data address space read/write non-volatile segments (external EEPROM)
=====================================================================
segment address range max size (dec) used with compiler options
------- ------------- -------------- --------------------------
NO_INIT 60 - FFFF 64 Kbytes -e ("no_init" keyword)

"tiny" pointers can only access objects in the range 0-FF.
Option -y stores strings in ECSTR (init value in CCSTR) instead of CSTR,
and stores constants in IDATA1 (init value in CDATA1).
-!

-! First define CPU -!

-ca90
-! Program address space (internal Flash memory) -!
-Z(CODE)INTVEC=0
-Z(CODE)RCODE,CDATA0,CDATA1,CCSTR,SWITCH,FLASH,CODE

-! Data address space -!
-! The registers are in 0-1F and memmory mapped I/O in 20-FF -!
-Z(DATA)IDATA0,UDATA0=100


-Z(DATA)RSTACK+60,CSTACK+100,IDATA1,UDATA1,ECSTR
-Z(DATA)NO_INIT
-Z(DATA)CSTR,CONST


-! Select reduced "printf" support to reduce library size.
See configuration section in manual concerning printf/sprintf. -!

-e_small_write=_formatted_write
-e_small_write_P=_formatted_write_P

-! Disable floating-point support in "scanf" to reduce library size.
See configuration section in manual concerning scanf/sscanf -!

-e_medium_read=_formatted_read
-e_medium_read_P=_formatted_read_P

-! Now load the 'C' library -!
-A c:\INCH\acpuras\cstartup.r90
-C cl3s

-! Code will now reside in file aout.a90 or aout.d90, unless -o is specified -!
-! .d90 is the default if debug system is linked (option -r) -!
-! .a90 is the default without debugging. Default format is -Fmotorola -!


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