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с8051f02x.pdf page 159
The C8051F020/1/2/3 are fully integrated mixed-signal System on a Chip MCUs with 64 digital I/O pins
(C8051F020/2) or 32 digital I/O pins (C8051F021/3), organized as 8-bit Ports. The lower ports: P0, P1, P2, and P3,
are both bit- and byte-addressable through their corresponding Port Data registers. The upper ports: P4, P5, P6, and
P7 are byte-addressable.
!!!!! All Port pins are 5 V-tolerant, and all support configurable Open-Drain or Push-Pull output modes and weak pull-ups.!!!!
(ОЗУ может быть 5 -вольтовым)
A block diagram of the Port I/O cell is shown in Figure 17.1. Complete Electrical Specifications
for the Port I/O pins are given in Table 16.1.
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