 Разработка, производство и продажа радиоэлектронной аппаратуры  |
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.CSEG
.ORG 0.INCLUDE "3333.vec"
.INCLUDE "3333.inc"__RESET:
CLI
CLR R30
OUT EECR,R30
OUT MCUCR,R30;DISABLE WATCHDOG
LDI R31,0x18
WDR
IN R26,MCUSR
CBR R26,8
OUT MCUSR,R26
OUT WDTCR,R31
OUT WDTCR,R30;CLEAR R2-R14
LDI R24,13
LDI R26,2
CLR R27
__CLEAR_REG:
ST X+,R30
DEC R24
BRNE __CLEAR_REG;CLEAR SRAM
LDI R24,LOW(0x100)
LDI R25,HIGH(0x100)
LDI R26,0x60
__CLEAR_SRAM:
ST X+,R30
SBIW R24,1
BRNE __CLEAR_SRAM;GLOBAL VARIABLES INITIALIZATION
LDI R30,LOW(__GLOBAL_INI_TBL*2)
LDI R31,HIGH(__GLOBAL_INI_TBL*2)
__GLOBAL_INI_NEXT:
LPM R24,Z+
LPM R25,Z+
SBIW R24,0
BREQ __GLOBAL_INI_END
LPM R26,Z+
LPM R27,Z+
LPM R0,Z+
LPM R1,Z+
MOVW R22,R30
MOVW R30,R0
__GLOBAL_INI_LOOP:
LPM R0,Z+
ST X+,R0
SBIW R24,1
BRNE __GLOBAL_INI_LOOP
MOVW R30,R22
RJMP __GLOBAL_INI_NEXT
__GLOBAL_INI_END:;GPIOR0-GPIOR2 INITIALIZATION
LDI R30,__GPIOR0_INIT
OUT GPIOR0,R30
LDI R30,__GPIOR1_INIT
OUT GPIOR1,R30
LDI R30,__GPIOR2_INIT
OUT GPIOR2,R30;STACK POINTER INITIALIZATION
LDI R30,LOW(0x15F)
OUT SPL,R30
LDI R30,HIGH(0x15F)
OUT SPH,R30;DATA STACK POINTER INITIALIZATION
LDI R28,LOW(0xA0)
LDI R29,HIGH(0xA0)RJMP _main
.ESEG
.ORG 0.DSEG
.ORG 0xA0
; 1 /*****************************************************
; 2 This program was produced by the
; 3 CodeWizardAVR V1.25.5 Professional
; 4 Automatic Program Generator
; 5 © Copyright 1998-2007 Pavel Haiduc, HP InfoTech s.r.l.
; 6 http://www.hpinfotech.com
; 7
; 8 Project :
; 9 Version :
; 10 Date : 12.06.2007
; 11 Author : F4CG
; 12 Company : F4CG
; 13 Comments:
; 14
; 15
; 16 Chip type : ATtiny45
; 17 Clock frequency : 14.318000 MHz
; 18 Memory model : Tiny
; 19 External SRAM size : 0
; 20 Data Stack size : 64
; 21 *****************************************************/
; 22
; 23 #include
; 24 #ifndef __SLEEP_DEFINED__
#ifndef __SLEEP_DEFINED__
; 25 #define __SLEEP_DEFINED__
#define __SLEEP_DEFINED__
; 26 .EQU __se_bit=0x20
.EQU __se_bit=0x20
; 27 .EQU __sm_mask=0x18
.EQU __sm_mask=0x18
; 28 .EQU __sm_adc_noise_red=0x08
.EQU __sm_adc_noise_red=0x08
; 29 .EQU __sm_powerdown=0x08
.EQU __sm_powerdown=0x08
; 30 .EQU __sm_standby=0x10
.EQU __sm_standby=0x10
; 31 .SET power_ctrl_reg=mcucr
.SET power_ctrl_reg=mcucr
; 32 #endif
#endif
; 33 #include
; 34
; 35 int mas[22];
_mas:
.BYTE 0x2C
; 36 int counter;
; 37
; 38 int main( void )
; 39 {.CSEG
_main:
; 40 unsigned char led;
; 41
; 42 PORTB = 0xFF; // Give PORTB and the User LEDs an initial startvalue
; led -> R17
LDI R30,LOW(255)
OUT 0x18,R30
; 43
; 44 led = 1; // Start with LED0
LDI R17,LOW(1)
; 45
; 46 DDRB = 0xFF; // Set PORTB as output
OUT 0x17,R30
; 47
; 48 while(1) // Eternal loop
_0x3:
; 49 {
; 50 counter++;
MOVW R30,R2
ADIW R30,1
MOVW R2,R30
; 51 mas[2]=counter;
__POINTW1MN _mas,4
ST Z,R2
STD Z+1,R3
; 52 PORTB = ~led; // Invert the output since a zero means: LED on
MOV R30,R17
COM R30
OUT 0x18,R30
; 53 led <<= 1; // Move to next LED by performing a rotate left
LSL R17
; 54
; 55 if (!led)
CPI R17,0
BRNE _0x6
; 56 led = 1; // If overflow: start with LED0 again
LDI R17,LOW(1)
; 57
; 58 delay_ms(500); // Wait for 500 000 cycles
_0x6:
LDI R30,LOW(500)
LDI R31,HIGH(500)
ST -Y,R31
ST -Y,R30
RCALL _delay_ms
; 59 }
RJMP _0x3
; 60 }
_0x7:
RJMP _0x7
; 61
; 62
_delay_ms:
ld r30,y+
ld r31,y+
adiw r30,0
breq __delay_ms1
__delay_ms0:
__DELAY_USW 0xDFB
wdr
sbiw r30,1
brne __delay_ms0
__delay_ms1:
ret;END OF CODE MARKER
__END_OF_CODE:
