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use 18.432 cycstal on s64.
i set my mclk as follow and all of them are work:
1-0 wait state , 18.432/5=3.6864mhz*31 = 114.2784/2=57.1392
2-1 wait state , 18.432/5=3.6864mhz*25 = 92.16/1 = 92.16
in the first how can possible that sam7 work with 0 wait state and clock above 30 mhz(here 57.13mhz)?
in the secend with 1 wait state and 92 mhz so flash run 92/2 = 46mhz(46 > 30MHZ)
in both of them the flash must not work but it work with out any problem
i test board in the temptare range (-20 c ~ 25 c) for 1 day.it worked.
can some one tell me why in datasheet write only work up to 55mhz and from flash 30 mhz but i can run it more?(with out wait state)pll set for 57mhz with out wait state
void AT91F_LowLevelInit( void) @ "ICODE"
{
int i;
AT91PS_PMC pPMC = AT91C_BASE_PMC;
//* Set Flash Waite sate
// Single Cycle Access at Up to 30 MHz, or 40
// if MCK = 47923200 I have 50 Cycle for 1 usecond ( flied MC_FMR->FMCN
AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN)&(48 <<16)) | AT91C_MC_FWS_0FWS ;//i change here//* Watchdog Disable
AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;//* Set MCK at 47 923 200
// 1 Enabling the Main Oscillator:
// SCK = 1/32768 = 30.51 uSecond
// Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 << | AT91C_CKGR_MOSCEN ));
// Wait the startup time
while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));
// 2 Checking the Main Oscillator Frequency (Optional)
// 3 Setting PLL and divider:
// - div by 5 Fin = 3,6864 =(18,432 / 5)
// - Mul 25+1: Fout = 95,8464 =(3,6864 *26)
// for 96 MHz the erroe is 0.16%
// Field out NOT USED = 0
// PLLCOUNT pll startup time estimate at : 0.844 ms
// PLLCOUNT 28 = 0.000844 /(1/32768)
pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 0x05) |
(AT91C_CKGR_PLLCOUNT & (28<<) |
(AT91C_CKGR_MUL & (30<<16))); //i change here// Wait the startup time
while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));
while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
// 4. Selection of Master Clock and Processor Clock
// select the PLL clock divided by 2
pPMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK ;
while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));// Set up the default interrupts handler vectors
AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
for (i=1;i < 31; i++)
{
AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
}
AT91C_BASE_AIC->AIC_SPU = (int) AT91F_Spurious_handler ;
}but some one else run s256 up to 105 mhz with only one wait state.
it's work.
he do it for mp3 decode.the test sitution:
temp:-20c to +55c
0 wait state ,55.28 mhz,
run code from flash with out any problem
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