[an error occurred while processing this directive]
|
48 if (data & (1 << 15)) // Set the data bit
\ ??Out9833_0:
\ 0000000C FB17 BST R17,7
\ 0000000E F416 BRTC ??Out9833_1
49 DDS_PORT &= ~SDATA_BIT; //
\ 00000010 9895 CBI 0x12,0x05
\ 00000012 C001 RJMP ??Out9833_2
50 else //
51 DDS_PORT |= SDATA_BIT; //
\ ??Out9833_1:
\ 00000014 9A95 SBI 0x12,0x05
52 DDS_PORT |= SCLK_BIT; // Form clock pulse
\ ??Out9833_2:
\ 00000016 9A96 SBI 0x12,0x06
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