 Разработка, производство и продажа радиоэлектронной аппаратуры  |
Требуется программист в Зеленограде
- обработка данных с датчиков; ColdFire; 40 тыс. e-mail:jobsmp@pochta.ru |
Host interrupt (HINT). If the USB DMA controller completes a transfer between the USB host and the DSP memory (via an endpoint buffer) and the host requested an interrupt at the end of the transfer, the state machine sets the HIF flag bit in the host status register (USBHSTAT). If the HIE enable bit is 1 in the host control register (USBHCTL), an interrupt request is passed to the CPU.
Host error interrupt (HERRINT). During an OUT transfer, if the size of the data transferred from the host does not match the size specified in the protocol header, the state machine sets the HERRIF flag bit in USBHSTAT. If the HERRIE enable bit is 1 in USBHCTL, an interrupt request goes to the CPU.
